Find the truth table that describes the following circuit:
From the above logic diagram we can observe :
Or gates : 2= X+Y and X’+(y+z)’
Not gate: 1 =x’
Nor gates: 2 = (X’+(y+z)’)’ and ((x+y)+(X’+(y+z)’)’)’
x |
y |
z |
X’ |
X+y |
(y+z)’ |
(X’+(y+z)’)’ |
((x+y)+(X’+(y+z)’)’)’ |
0 |
0 |
0 |
1 |
0 |
1 |
0 |
1 |
0 |
0 |
1 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
0 |
1 |
1 |
0 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
0 |
1 |
0 |
1 |
0 |
1 |
0 |
1 |
0 |
1 |
1 |
0 |
0 |
1 |
0 |
1 |
0 |