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Authors:
Linda Null ,julia Lobur
Chapter:
A Closer Look At Instruction Set Architectures
Exercise:
Exercises
Question:17 | ISBN:9780763704445 | Edition: 3

Question

17. Write code to implement the expression A = (B + C) (D + E) on 3-, 2-, 1-, and 0-address machines. In accordance with programming language practice, computing the expression should not change the values of its operands.

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Answer

Three address machine: Computers with three address instructions formats can use each address field to specify either a processor register or memory operand.

ADD

R1 , B , C

R1 ß M[B]+M[C]

ADD

R2 , D , E

R2 ß M[D]+M[E]

MUL

A, R1 , R2

M[A]ß R1 * R2

 

Two address machine: two-address instruction are the most common in commercial computers. Here again each address field can specify either a  processor register or memory operand.

Load

R1 , B

R1 ß M[B]

ADD

R1 , C

R1 ß R1 + M[C]

Load

R2 , D

R2 ßM[D]

ADD

R2 , E

R2 ß R2 + M[E]

MUL

R1 , R2

R1 ß R1 * R2 

Store

A , R1

M[A]ßR1 

 

 One Address machine: One-address instructions use an implied accumulator (AC) for all data manipulations. For multiplications and division there is a need for second register.   

Load

B

ACßM[B]

ADD

C

ACßAC+M[C]

Store

Temp

M[Temp]ß AC

Load

D

ACßM[D]

ADD

E

ACßAC+M[E]

MUL

Temp

ACßAC*M[Temp]

Store

A

M[A]ßAC

 

Zero Address machine: A stack organized computer does not use an address field for the instructions ADD and MUL. The PUSH and POP instructions however need an address field to specify the operand that communicates with the stack. To evaluate arithmetic expressions in a stack computer , it is necessary to convert the expression into reverse Polish notation

PUSH

B

TOSßB

PUSH

C

TOSßC

ADD

 

TOSß (B+C)

Push

D

TOSßD

Push

E

TOSßE

ADD

 

TOSß(D+E)

Mul

 

TOSß(B+C)*(D+E)

POP

A

M[A]ßTOS

 

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